Friday, January 4, 2019

cpu - What are "Instructions per Cycle"?



I've been learning a little bit more about how processors work, but I haven't been able to find a straight answer about instructions per cycle.



For instance, I was under the impression that a four core CPU could execute four instructions per cycle, so a four core CPU running at 2Ghz would execute 8 billion operations per second. Is this the case?




I'm sure it's oversimplifying things, but if there's a guide or something else I can use to set myself straight, I'm definitely open to ideas.


Answer



The keywords you should probably look up are CISC, RISC and superscalar architecture.



CISC



In a CISC architecture (x86, 68000, VAX) one instruction is powerful, but it takes multiple cycles to process.
In older architectures the number of cycles was fixed, nowadays the number of cycles per instruction usually depends on various factors (cache hit/miss, branch prediction, etc.). There are tables to look up that stuff. Often there are also facilitates to actually measure how many cycles a certain instruction under certain circumstances takes (see performance counters).




If you are interested in the details for Intel, the Intel 64 and IA-32 Optimization Reference Manual is a very good read.



RISC



RISC (ARM, PowerPC, SPARC) architecture means usually one very simple instruction takes only a few (often only one) cycle.



Superscalar



But regardless of CISC or RISC there is the superscalar architecture.
The CPU is not processing one instruction after another but is working on many instructions simultaneously, very much like an assembly line.




The consequence is: If you simply look up the cycles for every instruction of your program and then add them all up you will end up with a number way to high. Suppose you have a single core RISC CPU. The time to process a single instruction can never be less than the time of one cycle, but the overall throughput may well be several instructions per cycle.


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