Harvard Architecture : How does it improve speed?

I don't understand the difference between Von Neumann and Harvard architectures. Let's say you have these two instructions :

MOV ax, [address2]

MOV bx, ax

In Harvard architecture, the processor must wait two cycles before executing the second instruction : the first one to decode the first instruction, and the second one to load the value in address 2 into ax. He cannot execute instruction 2 immediately because it uses the value of ax.

So the time spent will be the same as if it was Von Neumann, in this later case, the first cycle will be used to decode the instruction and the second cycle to fetch the content of address 2 from program's memory.

What do I not understand ?